Deep interpretation of ATE-based IC test technology

With the development of science and technology, the IC industry has been rapidly upgraded, and the manufacturing complexity of IC has become more stringent. IC testing also faces many challenges, the most typical of which is the accuracy and stability of the test. Especially when the mass production ATE test is more serious, how can we avoid wasting a lot of test time due to repeated test retests due to unstable test?

This article conducts in-depth analysis of the basic parameters of IC test: voltage, current, time, THD, etc., and gives examples to illustrate how to solve such problems for the reference of the majority of test engineers.

In the IC test, the voltage test is the most common one of all the test parameters, especially the test of the analog chip. The voltage test is more common and important, such as: LDO, LED driver, audio amplifier, op amp, motor Many types of analog chips, such as drivers, contain voltage parameter tests and are their main performance parameters. In addition, many other parameters are indirectly obtained by voltage measurement, such as gain (Gain), power supply voltage rejection ratio (PSRR), and common mode rejection ratio (CMRR). Engineers often encounter inaccurate or unstable voltage measurements during debugging. For the problem of inaccurate testing, the method of correlaTIon is mainly used to adjust the error of the test, but this method is still for linear chips. Can be used, but it is useless for non-linear chips. For the problem of unstable test, most of them use the method of multiple measurements to average, but this method is also a temporary solution, which will also bring hidden dangers to the quality of the product. So how do you solve these problems with voltage testing? The specific reasons for these phenomena will be specifically analyzed below, and some solutions will be explained for these reasons.

The working state of the chip is not fully established or has a shock

Generally, before developing the test program, you must understand the function and performance parameters of the tested chip, so that you can know when developing and debugging the program. For example, test the output voltage parameters of the LDO. You must be clear: in the current input and output filter capacitors. Next, after the input voltage is added, how long does it take for the output voltage to stabilize, and the waiting time set in the program must be greater than this settling time, so that the test can be accurate and stable. Of course, the LDO output stabilization time is generally in the microsecond level (tens to hundreds of microseconds), so this problem is not encountered when debugging, but sometimes we need to test the internal reference voltage of the chip, but there is no The method is directly tested and can only be tested indirectly through other pins. Figure 1 shows the part of the circuit diagram of the LED driver chip.

figure 1

We want to test the voltage of the Vref inside the chip, but there is no direct pin out, so we can only test it indirectly by testing the voltage at the VO terminal, but it should be noted that if the VO terminal is floating and no current flows, then it is above The MOS tube cannot be turned on normally, and the feedback loop of EA1 cannot be established normally, and the voltage at the VO terminal is also uncertain. The VO voltage tested at this time will not represent the voltage of Vref. Therefore, in the test, we must give the VO a certain load to allow the MOS tube and EA1 to work properly, so as to correctly test the voltage of Vref.

The establishment of the working state of the chip sometimes takes a long time, as shown in Fig. 2 is a functional block diagram of an audio power amplifier (LM4990) and a typical application circuit diagram.

figure 2

We will test some static DC parameters during the ATE test, such as bypass, Vo1, Vo2 voltage values. When you carefully study the manual of this chip, you will find that when the power supply voltage is 5V and Cbypass is 1Uf (note the different power supply voltages). And Cbypass capacitors, the stability time is also different), the voltage at the bypass terminal needs at least 100ms to achieve stability, and the voltage at the Vo1 and Vo2 terminals is affected by the voltage at the bypass terminal. Therefore, in order to test these DC parameters stably and accurately, it is necessary to Wait for more than 100ms after the chip is powered up and then test it (must consider the difference between different batches of chips, so the waiting time in the actual test can be around 120ms), but for mass production testing, the length of the test will directly affect Test efficiency and test costs, we must shorten the test time! So how to solve this problem, generally we can use the following two methods:

First, you can reduce the capacitance of Cbypass, so the same charging current and voltage, charging time will decrease with the decrease of capacitance, you can use 0.1uF or less capacitor instead, some readers may say: This will definitely affect the testing of the subsequent AC parameters (such as THD), yes! Definitely will have an impact! So how do you solve it? In fact, it is very simple, there are two solutions:

1. Through the test evaluation, the test specification of the AC parameters at 0.1uF is appropriately adjusted, and this scheme can be adopted when the test requirements are not high;

2. The external capacitor is used to select the capacitance value when testing the DC and AC parameters, but the connection method of the relay is also very particular, otherwise it will have an influence on the AC parameters, which will be elaborated in the following paragraphs.

Second, the pre-charging method can be used to charge the Cbypass in advance. If the bypass terminal is 2.5V under normal power supply voltage of 5V, we can pre-charge to 2.3V, which can save a lot of time, but One solution that must be addressed with this solution is that it does not cause additional interference to the bypass side while charging, and the chip does not work properly.

image 3

Oscillation is also a common phenomenon in chip debugging, which brings many problems to the chip test. There are many reasons for the oscillation: the size of the output capacitive load, the impedance mismatch, the improper feedback loop, etc., as shown in Figure 3 An electric performance characteristic curve and test chart in an LDO (TL431) chip manual, the size range of the output capacitive load CL is clearly specified in the figure, but we may not notice this in actual debugging, if selected The output capacitor is not within the capacitance range required for the chip to stabilize, and the output will oscillate, resulting in an inaccurate and unstable output test. Therefore, I would like to remind everyone again: Be sure to understand the performance of the chip before debugging, so as not to waste a lot of time in the later debugging.

In addition, the oscillation occurs not only when the chip is working normally, but also when it is static. Especially when you are testing an op amp with a high magnification, you should pay special attention to the input pins at this time, and if necessary, isolate them to avoid introducing unnecessary noise and causing the output to oscillate.

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