A program generation specification must be created before compiling the FPGA VI to the FPGA application. LabVIEW generates HDL and bit files from the block diagram using the set program generation specification options.
Right-click the build specification under the FPGA terminal in the Project Explorer window and select the following options. Options may change depending on the hardware terminal used.
Generate - Generates the current file only when the FPGA VI or the build specification changes based on the last time the compiled VI was changed. This command will then compile the VI.
Rebuild - Generates the current file regardless of whether the FPGA VI or the build specification has changed, and then compiles the VI.
Estimated resource usage - Use the Xilinx tool to estimate FPGA resource usage without compiling. If the generated code signature is not the current signature, this command first generates the current file and then estimates the resource usage.
Check signature - determines if the bit file is the current file. If the bit file does not exist, the command checks the generated code signature.
Generate current file - Generates the current file without compiling the VI. Generating the current file can get a specific code generation error.
Show Compilation Results - Displays the Compile Status window. A build specification must be created to display the compilation status window.
Specify the default build specification
The default build specification is the build specification used to run the button and compile and run the FPGA application. If you do not specify a build specification before clicking the Run button, LabVIEW will automatically create and specify a default build specification for the corresponding VI.
To specify a default build specification, check the Set as default build specification on the Source Files page of the Compile Properties dialog.
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