Design and Implementation of Digital Audio Power Amplifier Processing Chip

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At present, digital technology plays an increasingly important role in human civilization and is becoming an indispensable part of life. "Digital power amplifier circuit" refers to the processing of audio signals by digital technology, converting analog audio signals into digital signals, and finally using Pulse Width Modulation (PWM) or Pulse Density Modulation (PDM). In this way, a high-power switching transistor (usually a MOS FET) is driven, and an analog audio signal is obtained by ∑ transformation by an LC circuit, and the high-frequency pulse component is filtered out, and then the speaker is played.

Compared with the traditional analog power amplifier, the advantages of the digital power amplifier are: (1) the efficiency of the digital power amplifier is higher, more than 80%, the TPA203XDl series like TI can reach up to 88%, and the DPO8000 of APOGEE is 90% efficient. The heat is very small; the efficiency of the class AB amplifier of the analog power amplifier is only 60%, and the efficiency of the pure class A power amplifier is only about 30%. After comparison, in the case of outputting the same power, the heat output of the digital power amplifier is only about 25% of the heat generated by the class AB power amplifier; and the power consumption is only about 60% of the AB class. (2) The sound quality of digital power amplifier can be comparable to that of pure class A, but the efficiency of class A is extremely low, it is easy to generate heat, and the power is not easy to be large; the sound quality of class AB is poor, and crossover distortion is easy to occur in small signals, and the power is large. It is also prone to fever. In contrast, digital power amplifiers have the advantages of high power, high performance, and low distortion. (3) The anti-interference ability is strong, and the signal amplification part of the digital power amplifier adopts the digital amplification method, because the digital signal is not easily interfered by external stray electric waves. The digital amplifier is amplified by first converting the input analog signal into a digital signal and then amplifying the digital signal. The analog power amplifier directly amplifies the input signal, and the analog signal is easily interfered by external stray electric waves, which generates some noise and affects the performance of the whole machine. (4) It is suitable for mass production. Because the consistency of the product is good, there is no need to debug in the production, only the components can be installed correctly.

Digital power amplifiers are mainly divided into three parts: digital signal processing, bridge power amplification and low-order analog low-pass filters. The audio signal processing function is to oversample, input, and requantize the input digital audio signal [Pulse Code Modulation (PCM) code] into an output of PWM form. The main function of the bridge power amplifier is to amplify the PWM signal voltage and output current to drive the low-pass filter. The low pass filter removes the high frequency component of the amplified PWM signal and restores it to an analog audio signal.

The author designs a digital audio processing part of digital power amplifier based on oversampling and ∑-Δ modulation, discusses the basic principle of its implementation and implements ASIC.

2 Digital audio processor structure and design [1-3]

The digital audio processing portion is the core of the digital power amplifier. Audio signal processing is to convert the audio input multi-bit PCM code signal into a PWM signal without distortion to drive the rear bridge power amplifier. Generally, two kinds of techniques are used to keep the output PWM signal and the original PCM coded signal with the same signal-to-noise ratio: (1) oversampling technology, that is, under the premise of the same signal-to-noise ratio, increasing the sampling frequency can reduce the number of bits of the coded word. (2) Noise shaping technology, which can drive the quantization noise to the high frequency band and reduce the noise power in the audible frequency band, thereby improving the quantization signal-to-noise ratio.

2.1 Oversampling Digital Filter

The oversampling technique refers to a method of sampling a signal at a frequency far higher than the Nyquist sampling frequency. It is known from the signal sampling quantization theory that if the minimum amplitude of the input signal is greater than the quantization step Δ of the quantizer and the amplitude of the input signal Randomly distributed, then the total power of the quantization noise is a constant, with the sampling frequency. /= Irrelevant, evenly distributed in the frequency range of 0 to fs/2. Therefore, the quantization noise level is inversely proportional to the sampling frequency. If the sampling frequency is increased, the quantization noise level can be lowered, and since the baseband is fixed, the noise power in the baseband range is reduced, and the signal-to-noise ratio is improved. Since the oversampling factor is increased, the word length required to represent a sample word can be reduced. For the audio signal processing to be performed, it is necessary to process the audio signal of 16 to 24 bits, and to convert it into a 1-bit PWM signal, which is 128 times oversampled here. The author adopts three-level implementation. The first two stages use two half-band filters to achieve 4 times oversampling, and the third stage uses comb-integral (~omb, CIC) filter to achieve. 1 is shown.

2.1.1 Half-band filter

In the design of the oversampling filter, the PCM signal is first passed through a half band filter. The half-band filter is a relatively effective filter design method with an interpolation factor of 2. The characteristic is that half of the coefficient of the transfer function is 0, so the operation is less than half compared with the FIR filter of the same length, which can greatly reduce the calculation amount of the filtering process and the use of the memory, which is beneficial to the implementation of the filter. Conducive to saving area. Its frequency response is characterized by the passband ripple and the stopband ripple, and the passband cutoff frequency and the stopband cutoff frequency are symmetric with respect to the angular frequency π/2. In this way, only the noise power outside the baseband is aliased into the transition band without affecting the baseband. In order to save the area, several identical linear phase filters are used as sub-filters, and these sub-filters are connected by multiplication and addition to form a half-band filter. The design uses two identical half-band filters so that the order of each half-band filter does not need to be too high.

2.1.2 CIC filter

After passing through two half-band filters, the audio signal is passed through a CIC filter to achieve 32 times oversampling. The interpolation filter (CIC) is proposed by H0genauer. It does not require a multiplier in hardware implementation, nor does it need to store filter coefficients. It can be implemented using only addition and registers. It is mainly used at high sampling frequencies, which can greatly reduce resource utilization.

The CIC filter consists of an integral part operating at a high sampling frequency and a comb portion operating at a low sampling frequency. The integral part of the CIC filter is composed of N-level digital integration units, working at high frequency fs, the transfer function of the single-stage integrator

The comb portion operates at a low sampling frequency fs/R, where R is an integer multiple of the frequency conversion factor, and the transfer function of the single-stage comb filter

With fs as the reference, the transfer function of the entire filter

2.2 Noise shaping technology

Simply using oversampling technology, in order to maintain the same signal-to-noise ratio, if the oversampling coefficient is too high, it is difficult to implement on hardware, so the combination of oversampling and noise shaping reduces the noise in the effective frequency band. Decrease the word length required to represent each sample.

Here I use the ∑-Δ modulation technology. The ∑-Δ modulation technique was developed on the basis of incremental modulation. Incremental modulation is to quantize the difference between the sample points before and after, which can also represent the information contained in the continuous signal. The essential difference between it and PCM coding is that it has only one bit of code, but this bit code does not indicate the size of the signal sample value, but rather the change trend of the waveform at the time of sampling. The ∑-Δ modulation is based on the incremental modulation. The input signal is first integrated to reduce the amplitude of the high-frequency component of the signal, and then incrementally modulated. It can be more suitable for the rich signal source requirements of the high-frequency end. Conventional PCM coding divides the signal into multiple amplitude levels, while the △-Δ transformation divides the signal by time, keeping the amplitude constant.

Figure 2 is a block diagram of the second-order ∑-Δ modulation used by the author in the design.

Can be obtained from Figure 2

The original signal X(z) is completely contained in l, (z) after passing through the noise shaping circuit, and the quantization noise is added to the output Y(z) after being applied by a function H2(z), making the slope of the noise distribution steeper. The quantization noise in the low frequency region is further reduced. The noise energy distribution diagram is shown in Figure 3.

It can be seen that the in-band noise is reduced and the out-of-band noise is added, and the out-of-band noise can be filtered out very easily by the subsequent analog filter.

Based on the above analysis, the system implementation block diagram proposed by the author is shown in Figure 4. The design has an I2S audio interface and an I2C control data interface. The PCM audio data entered through the I2S is stored in the data register, the control signal entered from the I2C enters the parameter register set, and the audio signal is controlled by the interpolation filter module. The signal is driven by noise shaping and digital pulse width modulation to output a PWM signal to drive the amplifier.

3 FPGA verification and ASIC implementation of digital signal processing part

3.1 FPGA implementation

I chose XC3S1500 from Xilinx's SPARTAN3 series as the verification platform. Using Xilinx's ISE8.1 as a comprehensive tool, the integrated circuit diagram of the top-level module shown in Figure 5 is obtained. The circuit clock uses the 75 MHz clock that comes with the XC3S1500. After DCM is divided into 50 MHz, it is supplied to the circuit. After the circuit test, The sound is found to be good, and the specific circuit diagram is shown in Figure 5.

3.2 ASIC implementation

The author finally realized the chip design. I chose Chartered's 0.35μ library and used Synopsys' back-end Design C0mplier Prime Time, Astro, Hercules and other tools for back-end design. The chip size is 2 342 mm x 2 342 mm, and the ASIC implementation is shown in Figure 6.

The actual operating frequency of this design is 50 MHz. During the design process, the clock is set to 80 MHz. After the Prime Time verification, the system timing is good and fully meets the requirements.

4 Conclusion

At present, the field of digital power amplifier is growing, but the situation in China is worrying. The digital power amplifier system proposed in this paper is mainly for the realization of low-end products, which can lay a solid foundation for further research.

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