The quality and durability of the next-generation Flash memory are becoming more and more declining. Customers in the industrial control market often only dare to choose the high-priced SLC memory, which also limits the SSD capacity in industrial control applications. The quality level of iSLC memory technology, coupled with the introduction of various maintenance, monitoring of SSD internal Flash wear leveling (Wear Leveling), quality and stability of key technologies, so that MLC can import lightweight industrial control applications, and iSLC memory will become The new favorite of industrial control applications.

Challenges of MLC in embedded industrial control applications

With the progress of the NAND Flash process, the width and spacing of the lines are getting smaller and smaller, which together affects the reduction of the erasable times (P / E Cycles). Taking SLC memory as an example, from 100,000 P / E Cycles in the 3x nanometer process (3xnm) era, only 4 ECC bits (instant error correction bits) are needed, to the SLC in the 2x nanometer process era, the P / E Cycles drop Up to 60,000 times and requires ECC 24bit.

Wu Xixi, Associate, FLASH Business Division, Industrial Control, Yiding International Co., Ltd.

MLC Flash requires ECC 8bit and P / E cycles of 10,000 times from the early 5x nanometer process, and P / E Cycles drops to 5,000 times at 3xnm MLC, and ECC explodes to 15bit; P / E at 2xnm MLC Cycles has been reduced to 3,000 times. When ECC 24bit and 2ynm MLC are required, the number of correction bits is increased to ECC 40bit.

The transmission rate of peripheral storage devices is also increasing. In 2010, ONFI 2.0 was promoted to 133MB / s, and the eMMC v4.41 transfer rate was 104MB / s. In 2011, ONFI v2.2 / Toggle 1.0 specifications increased the Flash transfer rate to 200MB / s and eMMC v4.5 to 200MB. / s; UFS 1.0 transfer rate is 2.9Gbps, SATA II specifications to 3Gbps (300MB / s); 2012 ONFI v3.0 / Toggle v1.5 increased to 400MB / s, UFS v2.0 transfer rate doubled to 5.8Gbps, SATA III It is 6Gbps (600MB / s); by 2015, the transmission rate defined by the ONFI v4.x / Toggle v2.xx specifications has increased to 800MB / s and 1.6GB / s.

Facing the challenges of the continued decline in the durability and quality of the new generation of Flash

Wu Xixi pointed out that the challenge of using MLC memory lies in the continuous increase of the number of error bits. The 2ynm process has exceeded 40. The number of error bits will also increase under the wide temperature environment of -40 to 85 ° C. At the same time, the MLC is suddenly interrupted during power It is easy to lose data under the Power Cycling test, and the data life will be shortened with the increase of P / E Cycles, and the 16K paging design MLC will spend more processing time when doing garbage collection (Garbage CollecTIon).

If a customer evaluates that he wants to import MLC into a lightweight industrial control application, in addition to a good average erasure mechanism and internal monitoring tools, other auxiliary technologies are also required.

MLC will increase the number of erasures with P / E cycles, and the number of error bits will gradually increase. According to the internal long-term test results of Yiding, taking 3xnm MLC as an example, from within 1,000 P / E Cycles, only one error bit is generated on average; after 20,000 P / E cycles, the number of error bits has increased by 5 Times. The MLC of the 2xnm process has an average number of error bits below 1,000 P / E cycles, which has been increased to 25 after 8,000 times; The MLC of the 2ynm process has an error bit of 1,000 P / E cycles The number of yuan is increased to 34 at 8,000 times and to 41 at 10,000 times.

Yiding proposes Flash Correct-and-Refresh (FCR) technology to read and monitor MLC blocks with abnormally increased error bit rate at any time. After correction, move to other blocks with better storage conditions and rewrite and update. Improve the service life of Flash. Yiding also developed a smarter block recovery (Garbage CollecTIon) algorithm for 16KB paging MLC Flash to reduce the delay of SSD data maintenance.

Wu Xixi believes that if you want to use MLC memory, you can use dynamic wear-leveling (Dynamic Wear-Leveling) technology, together with static wear-leveling (StaTIc Wear-Leveling), for MLC with only 3,000 P / E Cycles Especially important. For example, Innodisk provides an iSMART tool program, which can display the number of writes of a certain block of the SSD and the overall Wear-Leveling effect in the form of a dotted distribution map. Monitoring and estimation, at the same time, it can also exert monitoring performance and pre-warning function.

If the MLC suddenly loses power when writing data, in case the firmware is writing data or recovering blocks at this time, it is particularly easy to cause the joint effect of the written storage page and the adjacent storage page. Even the entire SSD data is lost. Therefore, a good SSD control chip needs to have a failure / low voltage detection circuit. By detecting a voltage drop in the input current, it can quickly complete the written memory page, restore the necessary system status flag and restart Load the OS.

Provide low-cost, high-quality industrial control applications with iSLC

Under the industrial control application of general commercial temperature (0 ~ 70 ℃), it requires frequent reading and writing and a five-year quality assurance. For heavy-duty applications with intensive reading and writing, customers often only choose SLC; but SLC and MLC The spread is almost five times faster. Therefore, Yiding proposed to replace it with iSLC memory solution.

The difference between iSLC and existing SLC and MLC memories is that iSLC uses the existing low-cost MLC memory process technology, and uses SLC read and write technology (only 1 bit of charge value is stored) in each cell circuit unit. Endurance As a result, it has increased to 30,000 P / E Cycles, which is between 60,000 SLC and 3,000 MLC. Although the cost is higher than MLC, it is half cheaper than SLC. It can be used in IPC / Kiosk / POS system, embedded system, server motherboard and thin terminal.

He listed a long-term durability test chart of MLC and iSLC with the same 2xnm process: MLC writes 20,000 consecutive times and generates more than 30 error bits; iSLC has only 6, even if it is continuously erased More than 100,000 times, the number of error bits generated is less than 10, and the durability and quality are comparable to the standard SLC process SLC memory. With 32G capacity SSD test, writing 32GB data 10 times a day, MLC can only maintain 0.8 years, old process (3xnm) SLC can reach 27.4 years, new process (2xnm) SLC can reach 16.4 years, and 2xnm process iSLC can reach 7.6 years.

Yiding International designed a series of products with iSLC flash memory technology, all designed for SATAâ…¡ interface:

Model 2.5 "SSD 2IE adopts 8-channel design, capacity 32GB ~ 256GB, sequential read and write speed is 230, 200MB / s; SATADOM-QVL 2IE and SATADOM-QV 2IE are 4-channel design, capacity 8 ~ 64GB, sequential read and write speed It is 130, 120MB / s; CFAST 2IE memory is also 4-channel design, with a capacity of 8 ~ 64GB, and sequential read and write speeds of 130 and 120MB / s. There are also mSATA modules for mSATA 2IE, SATA Slim 2IE for Halfslim size, and SATADOM QH 2IE modules are all SATAâ…¡interface four-channel design, with a capacity of 8 ~ 64GB, and sequential read and write speeds of 130 and 120MB / s

SATAIII solution for embedded applications

Wu Xixi then introduced the SATAIII product solution for embedded industrial control applications. Innodisk ID167 control chip developed by Yiding, adopts four-channel 8CE design, ECC data correction capacity is 40bit / 1KB; with 64Mx16bit DDRâ…¢ memory as read and write buffer, and only 33 mW in SATAâ…¢ Slumber, DEVSEL mode , 5mW power consumption. The SSD and mSATA modules designed with ID167 will begin to deliver samples in the first quarter of 2013.

Innodisk ID167 is equipped with Sync MLC Flash memory particles with 24 / 25nm process, and the performance is measured with IO Meter. The 64GB (4CH) version has sequential read / write performance of 480MB / s and 270MB / s. The read / write IOPS is 80K, 1K; the sequential read / write performance of the 128GB (4CH) version is 520MB / s, 350MB / s, and the continuous read / write IOPS is 80K, 2K; 256GB (4CH) The sequential read / write performance is 550MB / s and 400MB / s, and the continuous read / write IOPS is 80K and 3K. The performance is quite good.

Compared with the 128GB SLC SSD with mainstream industrial control applications, the measured results of CystalDiskMark v3.0 show that the sequential read and write speeds of 256GB MLC SATAIII SSD are 519 and 344MB / s, while the 128GB SLC SSD of pure SATAâ…¡ reads sequentially, The writing speed is 253, 190MB / s. At a similar cost, the 256GB MLC SATAIII SSD doubles the capacity and the performance is faster than the 128GB SLC SATAII SSD.

Yiding also provides SSD single chip module, which is made of Innodisk ID167 control chip plus Flash silicon wafer package for COB package, 32GB (4CH x 1CE) version, its sequential read and write speed is 480, 140MB / s. With the 32GB SATADOM of SATAII SLC, the performance of CystalDiskMark v3.0 was measured. SATA III reads sequentially and writes at 482, 271MB / s; SATA II reads sequentially and writes at 252, 235MB / s.

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